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Lasertec

6920.TMEDIUMScore: 71.8

EUV Inspection · Weight: 6%· Data as of 2026-05-07

Also in:AISemis
¥42,930+0.56%
6-month daily

Investment Thesis

100% monopoly in actinic EUV mask blank inspection. 46.1% op margin. ACTIS A200HiT (Oct 2025) extends monopoly to High-NA EUV — locking in every next-gen AI chip node. Intel 2025 & 2026 EPIC Supplier Awards confirm customer lock-in across entire EUV ecosystem. AI chip demand (NVIDIA H200/B200, AMD MI300) drives TSMC N2 ramp = direct Lasertec volume growth.

Risk

PE 44x premium. Q3 FY2026 EPS missed consensus by 25.9%. TSMC N2 ramp delay = direct revenue timing risk. Short-seller overhang.

Monitoring Trigger

Monitor ASML EXE:5000 High-NA quarterly shipments. NVIDIA/AMD orders for 2nm chips = Lasertec inspection demand proxy. Quarterly Lasertec order backlog (if disclosed).

Key Dates

2026-06-30rebalanceSemiannual portfolio rebalance
2026-08earningsLasertec FY2026 full-year results (FY ends June 2026). FY2027 guidance critical for AI chip demand visibility.
2026-12catalystTSMC N2 mass production ramp milestone. NVIDIA B300 series tape-out schedule.

Key Metrics

44.17
PE
45.06
Fwd PE
16.52
P/B
43.0%
ROE
46.1%
Op Margin
0%
D/E
0.8%
Div Yield
+¥96B
FCF
¥3.73T
Mkt Cap

Business Segments

SegmentRevenueShareDescription
Semiconductor Inspection¥226B90%EUV actinic blank + mask inspection (monopoly)
LED/Display Inspection¥25B10%Non-semiconductor inspection

Supply Chain Evidence

EvidenceCustomerProductDetail
confirmedASMLEUV ecosystem partner — High-NA ACTIS A200HiTPurpose-built product for ASML High-NA EUV launched Oct 2025. Co-dependency deepening into next decade.
confirmedTSMCEUV reticle inspection for 3nm/2nm AI chipsTSMC 2023 Excellent Performance Award. N2 ramp for AI accelerators (NVIDIA, Apple) = volume demand.
confirmedIntelEUV mask inspection — 2025 & 2026 EPIC award recipientIntel 2026 EPIC Supplier Award (Mar 2026) and 2025 EPIC award (Apr 2025). 2 consecutive years. Intel 18A uses EUV.

Recent News

Sources & References